Analog IC Layout Engineer

Hyderabad, Telangana, India • Posted June 06, 2026

Job Type: Full-time
Location: Hyderabad, Telangana
Posted: June 06, 2026
Category: Engineers
Application Deadline: July 16, 2026

Role Description

Senior Analog Layout Engineer


Location: Hyderabad, Bangalore

Experience: 4 to 6 Years

Notice Period: Immediate


Job Description:

Key Responsibilities

  • Custom Layout Design: Lead the layout development of critical analog blocks, including high-speed ADCs/DACs, PLLs, SerDes, Bandgaps, and LDOs.
  • Advanced Node Implementation: Navigate challenges unique to sub-3nm nodes, such as multi-patterning, EUV constraints, and FinFET/GAAFET-specific layout-dependent effects (LDE).
  • Physical Verification: Execute and debug comprehensive verification flows, including DRC, LVS, ERC, Antenna, and Latch-up checks using industry-standard tools.
  • Extraction & Analysis: Perform parasitic extrac...

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