Analog IC Layout Engineer
ireland, ireland, Ireland • Posted June 04, 2026
Job Type:
Part Time
Location:
ireland, ireland
Posted:
June 04, 2026
Category:
Engineers
Application Deadline:
July 14, 2026
Role Description
Senior Analog IC Layout Engineer Experienced analog IC layout, Coarse geometry, 0.35um CMOS Experience in Cadence tools , ASSURA DRC LVS , PVS DRC LVS, and QRC Experience in Mentor Calibre Tools DRC LVS and Parasitic Extraction
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