ASIC Design Engineer | Ottawa, Canada

ottawa, on, Canada • Posted June 06, 2026

Job Type: Full-time
Location: ottawa, on
Posted: June 06, 2026
Category: Engineering
Application Deadline: July 16, 2026

Role Description

Celero is seeking skilled and motivated ASIC Design Engineers to join our team and contribute to the development of optical transceivers for next-generation optical modems. The ideal candidate will play a crucial role in designing and developing ASICs for cutting‑edge technologies.

What you Will Do

  • Design and implement digital circuits using HDL (Verilog/ System Verilog).
  • Perform synthesis, timing analysis, Lint, formal equivalence, Clock Domain Crossing (CDC) analysis.
  • Optimize designs for performance, power, and area (PPA) requirements.
  • Perform RTL simulation and verification to ensure design functionality.
  • Participate in design reviews and provide technical guidance to team members.
  • Collaborate with cross‑functional teams on system integration and validation.

What you Will Bring

  • Bachelor’s or higher degree in Electrical Engin...

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