ASIC Design Engineering Technical Leader
Caesarea, Israel, Israel • Posted June 01, 2026
Job Type:
Full-time
Location:
Caesarea, Israel
Posted:
June 01, 2026
Category:
other-general
Application Deadline:
June 07, 2026
Role Description
**Meet the Team**
Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of what’s possible.
Cisco Silicon One™ is transforming the industry with a unified, programmable architecture powering Cisco’s future routing portfolio and shaping the Internet for decades to come.
**Your Impact**
+ Write and review micro-architecture specifications
+ Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
+ Contribute to full chip integration, timing methodology, and analysis
+ Collaborate with verification engineers to resolve bugs and achieve coverage closure
+ Work with the physical design team ...
Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of what’s possible.
Cisco Silicon One™ is transforming the industry with a unified, programmable architecture powering Cisco’s future routing portfolio and shaping the Internet for decades to come.
**Your Impact**
+ Write and review micro-architecture specifications
+ Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
+ Contribute to full chip integration, timing methodology, and analysis
+ Collaborate with verification engineers to resolve bugs and achieve coverage closure
+ Work with the physical design team ...
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