ASIC RTL Design Engineer III, Silicon

Bengaluru, India, India • Posted June 06, 2026

Job Type: Full-time
Location: Bengaluru, India
Posted: June 06, 2026
Category: other-general
Application Deadline: June 11, 2026

Role Description

ASIC RTL Design Engineer III, Silicon

_corporate_fare_ Google _place_ Bengaluru, Karnataka, India

**Mid**

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

**Minimum qualifications:**

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
+ 4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.
+ Experience with logic synthesis techniques to optimize RTL code, performance and power, as well as low-power design techniques.

**Preferred qualifications:**

+ Master's or PhD degree in Electrical Engineering, Computer Engineering, or Computer Science.
+ Experience with a scripting language like Perl or Python.
+ Experience with ASIC or FPGA design verification, s...

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