CMOS Test Structure Design & Layout Engineer

Mexico, jalisco, Mexico • Posted June 02, 2026

Job Type: Full-time
Location: Mexico, jalisco
Posted: June 02, 2026
Category: Ámbito creativo
Application Deadline: July 12, 2026

Role Description

3050 Micron Semiconductor Mexico, S.de R.L. de C.V. is seeking candidates with a Master's degree in Electrical, Computer, or Microelectronic Engineering for a role involving memory cell-based test structures. Strong candidates will have hands-on experience with EDA tools like Cadence Virtuoso and solid skills in circuit design and parametric testing.

The position offers a collaborative environment focused on process development and requires willingness to learn new skills. Join us in advancing semiconductor technologies.

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