Design Layout Engineer

tlaquepaque, jalisco, Mexico • Posted June 04, 2026

Job Type: Full-time
Location: tlaquepaque, jalisco
Posted: June 04, 2026
Category: Arquitectura y diseño de software
Application Deadline: July 14, 2026

Role Description

Responsibilities

  • Design and development of analog, mixed-signal, custom digital block and full chip level integration support.
  • Perform layout verification like LVS/DRC/Antenna, quality check and documentation.
  • Responsible for on-time delivery of block-level layouts with acceptable quality.
  • Will bee leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/achievements in multiple project environment.
  • Effectively communicating with Global engineering teams to assure the success of layout project.

Minimum Qualification

  • Around 5 years of experience in analog/custom layout design in sophisticated CMOS process, in various technology nodes (Planar, FinFET).
  • BE or MTech in Electronic/VLSI Engineering, or related.
  • Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.
  • Should have hands on experience in creati...

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