Design Verification Engineer
Hyderabad, Telangana, India • Posted May 29, 2026
Job Type:
Full-time
Location:
Hyderabad, Telangana
Posted:
May 29, 2026
Category:
Engineers
Application Deadline:
July 08, 2026
Role Description
Experience: 2-3 Years
Location: Hyderabad
Education: B.E./B.Tech. in ECE/EEE or M.E./M.Tech. in VLSI/Electronics
Roles and Responsibilities
- Strong expertise in UVM-based verification.
- Hands-on IP-level verification exposure and a solid understanding of serial protocols are a must.
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