DFT Engineer

Pu Dong Xin Qu, Shang Hai Shi, China • Posted June 06, 2026

Job Type: Full-time
Location: Pu Dong Xin Qu, Shang Hai Shi
Posted: June 06, 2026
Category: Engineers
Application Deadline: July 16, 2026

Role Description

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Job Description:

1.Participate in chip level DFT architecture definition.

2.Implement basic DFT schemes, including scan, boundary scan, Mem BIST and Logic BIST.

3.Verify all DFT logics and test patterns with simulation

4.Test modes static timing analysis

5.Participate in ATE bring-up and debug the DFT patterns on ATE.

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