DRAM Design Tech Layout Engineer

tlaquepaque, jalisco, Mexico • Posted May 29, 2026

Job Type: Full-time
Location: tlaquepaque, jalisco
Posted: May 29, 2026
Category: Arquitectura y diseño de software
Application Deadline: July 08, 2026

Role Description

As a member of the DRAM Design Engineering Group at Micron Technology, Inc., you will be responsible for translating schematics into layout used for the creation of fabrication reticules and meeting all engineering and process‑related criteria for assigned DRAM products.

You will organize and prioritize logistics and resource allocations to meet scheduled deadlines, and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits.

You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tapeout processes and procedures.

Responsibilities

  • Responsible for Design and development of IP layouts used in DRAM chips.
  • Perform layout verification like LVS/DRC/EM, quality check and documentation.
  • Responsib...

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