Field-Programmable Gate Arrays Engineer
Mumbai, Maharashtra, India • Posted May 30, 2026
Job Type:
Full-time
Location:
Mumbai, Maharashtra
Posted:
May 30, 2026
Category:
Engineers
Application Deadline:
July 09, 2026
Role Description
Job Title:
FPGA Design & Validation Engineer
Location:
Hyderabad
Experience:
5+ Years
Role Overview:
We are seeking a skilled FPGA Design & Validation Engineer with strong hands-on experience in FPGA development and board-level validation. The role requires expertise in validating designs, debugging hardware issues, and collaborating closely with cross-functional teams to ensure high-quality deliverables.
Key Responsibilities:
Perform FPGA design validation and verification on hardware boards
Execute board-level testing and debugging of FPGA designs
Analyze and validate signal integrity using lab instruments such as
oscilloscopes
Develop and automate validation workflows using
TCL scripting
Identify and resolve design issues related to
timing, functionality, and integration
Work closely with design teams to ensure smooth handoff from design to validation
Ensure adherence to quality processes and d...
FPGA Design & Validation Engineer
Location:
Hyderabad
Experience:
5+ Years
Role Overview:
We are seeking a skilled FPGA Design & Validation Engineer with strong hands-on experience in FPGA development and board-level validation. The role requires expertise in validating designs, debugging hardware issues, and collaborating closely with cross-functional teams to ensure high-quality deliverables.
Key Responsibilities:
Perform FPGA design validation and verification on hardware boards
Execute board-level testing and debugging of FPGA designs
Analyze and validate signal integrity using lab instruments such as
oscilloscopes
Develop and automate validation workflows using
TCL scripting
Identify and resolve design issues related to
timing, functionality, and integration
Work closely with design teams to ensure smooth handoff from design to validation
Ensure adherence to quality processes and d...
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