FPGA IP Validation & Emulation Engineer

bayan lepas, penang, Malaysia • Posted June 24, 2026

Job Type: Full-time
Location: bayan lepas, penang
Posted: June 24, 2026
Category: Engineering
Application Deadline: August 03, 2026

Role Description

Altera is seeking an IP Solution Engineer in Bayan Lepas, Malaysia, to focus on IP verification and validation across Altera FPGA products. You will create comprehensive validation plans and support cross-functional teams in IP functional validation. Applicants should have a Bachelor’s degree in Electrical Engineering with significant experience in FPGA design and validation methodologies.

This regular position offers the opportunity to work with advanced technologies and contribute to innovative solutions in a collaborative environment.

#J-18808-Ljbffr

Interested in this role?

Click the button below to start your application for FPGA IP Validation & Emulation Engineer at Altera.

Apply Now