IC Packaging Simulation Engineer

San Francisco, CA, United States • Posted June 03, 2026

Job Type: Full-time
Location: San Francisco, CA
Posted: June 03, 2026
Category: other-general
Application Deadline: June 08, 2026

Role Description

**Role Number:** 200660332-3401

**Summary**
Do you like to work on groundbreaking technologies that enable amazing new products? Do you have the attention for details and love for excellence to work towards an extraordinary result?
We are looking for a self-motivated Packaging Simulation Engineer who is proficient in FEM simulation with multi-year FEM software ANSYS or ABAQUS.
This position requires someone familiar with development process of simulation and characterization projects, that thrives in a multifaceted collaborative organization.

**Description**
In this role, you will be working on stress and deformation simulation of IC packages to provide a comprehensive understanding of chip-package interaction and package-board interaction to ensure good device yield and reliability. You will also be working on scripting CAD/FEM software, and Generative-AI/Machine Learning/numerical tools to set up automated model-generation user interfaces.

**Mi...

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