Layout Engineer

Takasaki, Japan, Japan • Posted June 01, 2026

Job Type: Full-time
Location: Takasaki, Japan
Posted: June 01, 2026
Category: other-general
Application Deadline: June 06, 2026

Role Description

Layout Engineer

Job Description

We are looking for a new engineer for mask layout design. The successful candidate will play a key role in the mask layout design and development of next-generation LV and MV shielded-gate trench MOSFET technologies. This role involves close collaboration with process integration team and external foundry partners to drive innovation, optimize performance, and accelerate product industrialization.

Mask layout design
• Chip layout design for LV/MV shield-gate trench MOSFET based on the design manual/rule (Virtuoso etc.)
• Verification of mask design rule check (Calibre etc.)

T/O procedures
• Schedule adjustment, Provenance tracking
• Define mask specification (Pellicle specification, inspection specification etc.)
• Scribe design, accessary layout such as alignment mark, inspection mark
• Build the related documents including shot map

Qualifications

• More than 5 ...

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