Lead Analog Layout Engineer - Chip Block Integration
tlaquepaque, jalisco, Mexico • Posted June 05, 2026
Job Type:
Full-time
Location:
tlaquepaque, jalisco
Posted:
June 05, 2026
Category:
Arquitectura y diseño de software
Application Deadline:
July 15, 2026
Role Description
Micron Technology is seeking an experienced analog/custom layout designer in Tlaquepaque, Jalisco. The ideal candidate will have around 5 years of experience in sophisticated CMOS processes and a BE or MTech in Electronic/VLSI Engineering. Responsibilities include designing and developing analog and mixed-signal blocks, performing layout verification, and leading project planning and execution. Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is essential. The company offers a dynamic work environment with opportunities for growth.
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