Lead Design Engineer

Bangalore, India, India • Posted June 01, 2026

Job Type: Full-time
Location: Bangalore, India
Posted: June 01, 2026
Category: other-general
Application Deadline: June 13, 2026

Role Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Be part of the Cadence Memory IP Group adn responsible for -

+ Developing firmware for DDR/LPDDR/GDDR/HBM PHY using microcontrollers

+ Responsible for developing firmware in C and similar Embedded programming languages typically involving bare-metal programming and developing low level APIs on Microcontrollers.

+ Responsible for collaborating with hardware designers and memory subsystem architects to derive algorithms and implement them.

+ Responsible for collaborating with verification team to deduce firmware-hardware co-verification plan.

+ Support debug of firmware-based simulations in hardware behavioral simulations (RTL simulations with firmware for verification)

+ Support debugging issues on emulation and Silicon bring-up boards.


Required Skills:

+ 4-6 years of experience in developing bare...

Interested in this role?

Click the button below to start your application for Lead Design Engineer at Cadence Design Systems, Inc..

Apply Now