Package Integration Engineer

San Francisco, CA, United States • Posted June 06, 2026

Job Type: Full-time
Location: San Francisco, CA
Posted: June 06, 2026
Category: other-general
Application Deadline: June 13, 2026

Role Description

**Role Number:** 200652031-3401

**Summary**
Looking for a senior level IC packaging engineer to develop exciting new products. You will be responsible providing Custom Silicon packaging solutions in a module/system for various consumer markets.

**Description**
• In this fast-paced environment, your role is to interface between internal product/device design, quality, supply chain, and the external suppliers to develop and deploy new packaging technologies.
• We are looking for individuals who are very innovative with a proven track record to

**Minimum Qualifications**

+ BS and 10+ years of relevant industry experience.

**Preferred Qualifications**

+ M.S or Ph.D. degree in mechanical engineering, physics, materials science or similar disciplines with a minimum of 10 years of experience in IC packaging. AutoCAD, APD and multi-physics simulation knowledge is a plus.
+ Some hands-on knowledge in Wafer Bumping, Manufacturing...

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