Principal Digital Verification Engineer

Principal Digital Verification Engineer

Job Description

· Verification of DDR5 Data Buffer to meet functional and performance specifications.

· Be able to integrate and test on System-level and block level using UVM methodology.

· Participate in feasibility studies.

· Support in developing verification plan based on specifications.

· Support in Verification planning, maintenance, feature extraction, verification tests, coverage and checker development.

· Develop efficient, reusable state-of-the-art verification environments and testbench structures.

· Optimize solutions for key indicators such as reusability, performance and ease of use

· Identify and communicate improvements that may ease verification and/or improve design behavior.

· Support in optimizing UVM based testbench.

· Take ownership of verification environments for assigned blocks, and tools appointed to you as Expert User.