Principal Functional Verification Engineer
Roma, Veneto, Italy • Posted June 03, 2026
Job Type:
CDI
Location:
Roma, Veneto
Posted:
June 03, 2026
Category:
Engineers
Application Deadline:
July 13, 2026
Role Description
The Role:
As a Functional Verification Principal Engineer, you will be interfacing with architecture, de-sign, physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work will involve high-level modelling, UVM, HW/SW Co-Debug, Simulation Acceleration support.
Key Responsibilities:
- Reading and analysing the system requirements and architecture requirement documents.
- Developing detailed Test and Coverage plans based on the Architecture and Micro-architec-ture.
- Developing Verification Methodology, ensuring scalability and portability across environ-ments.
- Developing Verification environment development and maintenance in SystemVeri-log/UVM/SystemC/C++, including all the respective components such as Stimulus, Checkers, Assertions, Trackers, and Coverage.
- Executing Verification Plans, including Desig...
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