Principal Product Validation Engineer
Noida, India, India • Posted June 08, 2026
Job Type:
Full-time
Location:
Noida, India
Posted:
June 08, 2026
Category:
other-general
Application Deadline:
June 13, 2026
Role Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
+ The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL).
+ Prior experience in simulation/emulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools.
+ Experience in process automation with scripting.
+ Experience with SystemVerilog, C++, UVM.
+ Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog.
+ Experience designing and implementing complex functional verification environments is required.
+ Knowledge of protocols like PCIe, USB3/4, DP an added advantage.
We’re doing work that matters....
+ The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL).
+ Prior experience in simulation/emulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools.
+ Experience in process automation with scripting.
+ Experience with SystemVerilog, C++, UVM.
+ Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog.
+ Experience designing and implementing complex functional verification environments is required.
+ Knowledge of protocols like PCIe, USB3/4, DP an added advantage.
We’re doing work that matters....
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