Semiconductor Layout Engineer

Greetings From TCS !!!

Role: Physical Design

Location: Bangalore

Experience Range: 5+ Years

Must-Have:

• Should have in depth experience in Floor-planning, CTS, Power routing, place and route, timing closure, DRC and LVS
• Should have worked on the latest technology nodes (14nm or 2nm to 5nm)
• Must have experience in Static timing analysis
• Must have experience in Physical verification and appropriate fixes
• Should have worked on block level and top-level designs
• Strong problem-solving skills and communication skills
• Ability to mentor and work closely with junior engineers
• Tools: Synopsys and Cadence