Senior ASIC Verification Engineer - UVM & C/C++ Focus
toronto, on, Canada • Posted May 24, 2026
Job Type:
Full-time
Location:
toronto, on
Posted:
May 24, 2026
Category:
Other-General
Application Deadline:
July 03, 2026
Role Description
A leading semiconductor company is seeking experienced ASIC Design Verification Engineers in Toronto to join their expanding team. This role involves using C/C++ and UVM to ensure high-quality verification of complex SoC products. Applicants should have a strong technical background in electrical engineering and experience with various communication protocols. This position offers an exciting opportunity to contribute to innovative design processes in a dynamic environment.
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