Senior Design Engineer- Emulation
burnaby, metro vancouver regional district, Canada • Posted May 31, 2026
Job Type:
Full-time
Location:
burnaby, metro vancouver regional district
Posted:
May 31, 2026
Category:
Other-General
Application Deadline:
July 10, 2026
Role Description
Job Description
The Architecture Co-Verification team (ACOV) is an exciting, fast paced team responsible for enabling HW/FW development and co-verification of state-of-art System-On-Chip (SoC) devices using industry leading HW emulators (such as Cadence Palladium and Protium). The team is deployed in all aspects of SoC development phases from architectural exploration to post-silicon validation, HW/FW co-development, pre-silicon functional co-verification, pre/post-silicon performance testing, power analysis, and critical post-silicon investigations.
This Role Is Perfect For You If You
- Thrive in a fast-paced, technically challenging environment
- Love solving complex system-level problems that span both hardware and firmware
- Enjoy working with state-of-the-art emulation and FPGA platforms
- Want to build broad, deep expertise and high visibility across the organization
Responsibilities (But Are Not Limit...
Interested in this role?
Click the button below to start your application for Senior Design Engineer- Emulation at Microchip Technology Inc..
Apply Now