Senior Design Verification Engineer

**Meet the Team**

Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major data centers worldwide. Collaborate with us on functional verification using SystemVerilog/UVM, and take advantage of opportunities to engage in various development stages, from architectural discussions to emulation and simulation support. Collaborate with global teams, design and block owners, chiplet and full-chip owners as well as emulation, compiler, and software development teams. Our team blends experienced and energetic engineers, fostering collaboration and transparency in an environment built on trust.

**Your Impact**

+ Implementation of DV infrastructure for block, cluster, and TOP-level environments.
+ Maintaining existing DV environments and enhancing them.
+ Ensuring complete verification coverage through implementation and review of code and functional coverage.<...