Senior Design Verification Engineer - Digital IC (UVM)
oulu, pohjois pohjanmaa, Finland • Posted June 06, 2026
Job Type:
Full-time
Location:
oulu, pohjois pohjanmaa
Posted:
June 06, 2026
Category:
Quality Engineering
Application Deadline:
July 16, 2026
Role Description
A leading technology firm in Oulu is seeking a motivated (Senior) Design Verification Engineer to join their Digital IC Design team. The ideal candidate will support peripheral verification and work closely with experienced colleagues in a collaborative environment. Responsibilities include debugging verification failures and understanding gate-level simulations. A university degree in Electrical Engineering or a similar field along with skills in UVM, System Verilog, and programming in C are essential. This position offers a chance to work with cutting-edge technology while being part of a supportive team culture.
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