Senior Design Verification Engineer

Mumbai, Maharashtra, India • Posted June 06, 2026

Job Type: Full-time
Location: Mumbai, Maharashtra
Posted: June 06, 2026
Category: Engineers
Application Deadline: July 16, 2026

Role Description

Job Description (JD): IP Verification Lead (8+ Years Experience)
Role:

IP Verification Lead
Experience:

8+ Years
Notice Period:

0–30 Days Preferred
Location:

Bengaluru / Chennai / Hyderabad
Job Summary
We are looking for an experienced

IP Verification Lead

with 8+ years of expertise in semiconductor/IP verification to lead verification activities for complex IP/subsystem development. The ideal candidate should have strong hands-on experience in verification methodologies, team collaboration, and end-to-end verification closure, with the ability to mentor engineers and drive quality deliverables.
Key Responsibilities
Lead and own

IP/subsystem verification

activities from planning to signoff.
Develop and execute

verification plans, testbenches, and coverage closure strategies .
Work extensively with

SystemVerilog, UVM, assertions (SVA), and scripting languages .
Defi...

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