Senior Design Verification Engineer

Responsibilities

• Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits
• Parasitic modeling and assisting in design validation, reticle experiments, and required tape‑out revisions
• Overseeing and managing the layout process including floor‑planning, placement, and routing
• Performing verification processes with modeling and simulation using industry‑standard simulators
• Contributing to cross‑group communication to work towards standardization and group success
• Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product
• Proactively soliciting guidance from Standards, CAD, modeling, and verification groups to improve design quality
• Driving innovation into future memory generations within a dynamic work environment <...