Senior DFT Engineer
bengaluru, karnataka, India • Posted June 04, 2026
Job Type:
Full-time
Location:
bengaluru, karnataka
Posted:
June 04, 2026
Category:
architecture,writing
Application Deadline:
July 14, 2026
Role Description
Senior DFT Engineer
Job Description
- PDL: Writing ICL and PDL by Own
- Debug protocols: Strong understanding on Jtag 1149.1-2013, ijtag - P1687
- Debug patterns exposure: .V, optional STIL or SVF
- SSN + SSH architecture understanding.
- Tessent tool exposure: TestKompress, Tessent shell
- Scripting: TCL, shell
Optional Skills (Good to have)
- SCAN architecture, past TAP/JTAG related DV feature.
- Patterns re-targetting
- Good Debug skills on the same.
Experience: 4 to 5 Years
Location: Bangalore
Interested in this role?
Click the button below to start your application for Senior DFT Engineer at ACL Digital.
Apply Now