Senior IP Design Engineer, Functional Safety (SoC/FPGA)

bayan lepas, penang, Malaysia • Posted June 21, 2026

Job Type: Full-time
Location: bayan lepas, penang
Posted: June 21, 2026
Category: Management & Operations
Application Deadline: July 31, 2026

Role Description

Lattice Semiconductor in Penang is seeking an experienced engineer to lead the development of Lattice Foundation IP with a focus on safety and robustness. Candidates should have 8+ years of experience in SoC and FPGA IP development and a strong grasp of FPGA software tools.

The role involves collaborating with different teams and ensuring compliance with functional safety standards such as IEC61508 and ISO26262. Lattice values technical leadership and accountability.

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