Senior Logic Design Verification Engineer

Senior Logic Design Verification Engineer

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The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We're inviting dynamic and imaginative technocrats to take part in creating it. The Power Management Controller IP (PMC) is responsible for managing the system boot and power for client and server chipsets.

Responsibilities

• As a member of the PMC Logic Design Verification team, you will work closely with IP architects to define and develop verification testbench and building RTL models for verification.
• You will be validating and verifying the functionality of new architectural features of next generation designs by developing testplan, tests content or test tools.
• You will be finding and implementing corrective measures for failing RTL tests, analyzes and uses results to modify testing.
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