Senior Power Model Integration Engineer

Lattice Semiconductor in Malaysia, Penang is looking for an experienced professional in hardware integration design. The candidate will collaborate with IP designers to plan and develop power models that require strong knowledge in FPGA tools, power estimation, and simulations.

The ideal applicant should have at least 10 years of relevant experience, proficiency in schematic generation using Cadence Virtuoso, and familiarity with Linux scripting and Python. Strong communication skills are essential for this collaborative role.