Senior RTL Design Engineer: DFT & ASIC Verification
capital, meta, Colombia • Posted June 11, 2026
Job Type:
Full-time
Location:
capital, meta
Posted:
June 11, 2026
Category:
Other-General
Application Deadline:
July 21, 2026
Role Description
Cisco Systems, Inc. is looking for an experienced ASIC Digital Design Engineer to work closely with cross-functional teams at its Yerevan office. You will take part in the design, development, and testing of advanced silicon solutions, ensuring high-quality verification that aligns with Cisco's performance standards.
The ideal candidate will have extensive experience in ASIC design and be proficient in Verilog/System Verilog coding. This hybrid role allows for four days per week at the office, fostering collaboration and innovation.
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