Senior RTL Power Optimization Engineer

Hyderabad, Telangana, India • Posted June 05, 2026

Job Type: Full-time
Location: Hyderabad, Telangana
Posted: June 05, 2026
Category: Engineers
Application Deadline: July 15, 2026

Role Description

Sr. Design Engineer - PPRTL / Prime Power


Job Description:

  • Experience in ASIC design flow and EDA tools experience such as PPRTL, PowerArtist and PrimePower or other power analysis/simulation tools
  • Analyze design metrics and make implementation choices to optimize PPA
  • Scripting language experience: Python, perl, shell preferred.
  • Exposure to RTL design and verification
  • Strong verbal and written communication skills
  • Knowledge of the PnR tools is added advantage
  • Power analysis using the power tools like PPRTL / Primepower.


Location: Hyderabad

Experience: 3 to 6 Years

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