SerDes System Validation Engineer

Cupertino, CA, United States • Posted June 03, 2026

Job Type: Full-time
Location: Cupertino, CA
Posted: June 03, 2026
Category: other-general
Application Deadline: June 08, 2026

Role Description

**Role Number:** 200657166-0836

**Summary**
We are looking for a SerDes System Validation Engineer to lead system validation of mixed-signal SerDes IP. In this highly visible role, you will actively work within Analog-Mixed/Signal design team and participate in validation and debug of embedded circuits; collaborating with many teams to enable the world’s premiere products. You will closely work with a hard-working group of Analog-Mixed/Signal designers working diligently to deliver hard IPs to Apple’s products while exceeding the highest expectations of quality, innovation and efficiency.
At Apple, we work every day to craft products that enrich people’s lives. In doing so, we face exciting challenges driven by the increasing complexity of SoC and PHY design. If you have strong technical fundamentals and a proven record of tackling complex problems—fueled by curiosity, a passion for learning, and a desire to enhance the impact of your work—we’d love to hear from you.

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