Staff Engineer (SoC, DFD Design Verification)

toronto, on, Canada • Posted May 31, 2026

Job Type: Full-time
Location: toronto, on
Posted: May 31, 2026
Category: Engineering
Application Deadline: July 10, 2026

Role Description

Requirements

  • Deeply curious about silicon debug/test infrastructure and its verification
  • Expert in UVM and verification of DFT/DFD features, scan, and on-chip trace logic
  • Comfortable working with Siemens Tessent flows, iJTAG, and advanced verification automation
  • Proactive, detail-oriented, and thrives in cross-functional technical discussions
  • Ideally familiar with tools similar to CocoTB

What the job involves

  • Tenstorrent is seeking an engineer who will focus on pre-silicon verification of DFD logic in advanced AI SoCs, driving coverage of debug, test, and bring-up features critical to silicon success
  • This role is hybrid, based out of Boston, MA; Toronto, Ottawa; or Santa Clara, CA
  • We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate leve...

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