Standard Cell Layout Engineer

General SummaryAs a member of the Qualcomm Standard Cell Design team, the candidate will be responsible for contributing to the development of high‐quality intellectual property (IP) for advanced semiconductor technology nodes.
This role involves applying strong technical expertise and creativity to deliver efficient and scalable physical layout designs within Qualcomm's structured and methodical design framework.
The position offers significant opportunities for professional and engineering growth through exposure to industry‐leading design practices and cutting‐edge technologies.Job DescriptionDesign and develop physical layouts for logic standard cells using industry‐standard computer‐aided design (CAD) tools, such as Cadence Virtuoso.
Leverage scripting and algorithmic programming languages, including SKILL and Python, to support layout automation, optimization, and design efficiency.Perform comprehensive layout verification, including Design Rule Checks (DRC), Layou...