Technology Layout Engineer

buenos aires, buenos aires, Argentina • Posted June 04, 2026

Job Type: Full-time
Location: buenos aires, buenos aires
Posted: June 04, 2026
Category: Other-General
Application Deadline: July 14, 2026

Role Description

Device Layout and Mask Tooling Engineer

The Device Layout and Mask Tooling Engineer will report to the Principal Design Enablement Engineer and will play a critical role in supporting the Design Enablement team. This role will perform semiconductor device layouts in an EDA software environment for semiconductor technology development and device modeling. In addition, this role will support the release of Foundry mask manufacturing requirements for a global design community. Candidate is responsible for developing and supporting internal/external mask tape out systems, generating and verifying GDS mask data, and MPW/Shuttle releases. This work directly impacts the development of our BCD technology and the success of our global design community.

Responsibilities

  • Generate semiconductor component layouts in Cadence to support semiconductor technology development, process technology transfers, and device modeling.
  • Primary interface and s...

Interested in this role?

Click the button below to start your application for Technology Layout Engineer at Allegro MicroSystems, LLC.

Apply Now