Timing Analysis Lead Engineer

Bengaluru, Karnataka, India • Posted June 01, 2026

Job Type: Full-time
Location: Bengaluru, Karnataka
Posted: June 01, 2026
Category: Computer Occupations
Application Deadline: July 11, 2026

Role Description

Job Title: STA Lead Engineers

Experience: 7+yrs

Location: Bangalore

Job Type: Full-time

Industry: Semiconductors / VLSI /STA Engineers


JD:

  • Deep understating and experience of STA tool Tempus/PrimeTime /Tweaker/ DMSA(PTECO)
  • Knowledge of timing corners/modes, process variations and signal integrity related issues are required
  • Experience in timing closure of high frequency blocks & subsystems (Ghz range )
  • Experience in working full-chip STA closure, defining mode requirements and corners for timing closure.
  • Strong Understanding of DFT modes requirements for timing signoff
  • Good understanding of physical design flow and ECO implementation.
  • Strong understanding of SDC constraints, OCV,AOCV,POCV analysis.
  • Strong TCL/scripting knowledge is mandatory.


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