VLSI Layout and Verification Engineer

Role and Responsibilities :

Analog Layout Design and develop critical analog, mixed-signal, and custom digital blocks. Perform comprehensive layout verification, including LVS, DRC, Antenna, PEX, Voltus, EMIR, and ensure quality checks and documentation support.

Deliver block-level layouts on time with high-quality standards.

Provide leadership in area estimation and execution to meet project schedules.

Collaborate effectively with team members and demonstrate strong teamwork skills. Communicate proactively with local engineering teams to ensure project success.

Qualifications / Requirements Experience:

5–8 years in analog/custom layout design across advanced CMOS processes and technology nodes (5nm to 130nm).

Tool Expertise:

Proficiency in Cadence MXL / EXL / GXL / XL, Voltus, Quantus;
Mentor Graphics Calibre(DRC/LVS/xACT);
Synopsys Star RC / R3D.

Layout Skills: Hands-on experience in designing critical block...